Nvidia remains TSMC's largest CoWoS capacity user in 2027, with TPU and CPU demand adding further upside

Overview

This report looks ahead to 2027 global CoWoS supply and demand and TSMC customer capacity allocation. The key conclusion is that Nvidia GPUs and CPUs will remain the largest driver of TSMC CoWoS demand; demand from Google TPU, AMD Venice CPU, Microsoft Maia, AWS Trainium 3, and other ASIC/CPU products will together lift advanced packaging, HBM, and wafer consumption. The report raises TSMC's assumed CoWoS capacity at the end of 2027 to 200kwpm and believes the non-TSMC camp will also expand to 80kwpm by the end of 2027.

Core views

First, Nvidia will still be TSMC's largest customer in 2027, with total CoWoS consumption expected to reach 1,222k, up 57% year over year; CoWoS-L is used for Blackwell, Rubin, and Rubin Ultra, while CoWoS-R corresponds to Vera CPU. Second, Google TPU-related demand is jointly carried by Broadcom and MediaTek; MediaTek's 180k CoWoS-S booking implies about 3.6 million TPU v8t ZebraFish units, while Broadcom's TPU v8i SunFish would imply about 3.9 million units if allocated 330k CoWoS-S. Third, CPUs are starting to consume meaningful 2.5D advanced packaging capacity, with Nvidia Vera CPU and AMD Venice CPU potentially reaching 5.75 million and 6.75 million units respectively in 2027. Fourth, TSMC, advanced packaging, testing, probe cards, and server BMC links in Taiwan's AI semiconductor supply chain are expected to benefit.

Analysis framework

The report uses a bottom-up framework combining industry research, customer booking breakdowns, CoWoS capacity allocation, chips per CoWoS wafer, HBM capacity, and wafer consumption to derive 2026e and 2027e global CoWoS demand, HBM demand, and wafer revenue TAM.

Methodology notes

• Supply-demand forecastCoWoS capacity allocation model

  Break down CoWoS demand by customer, packaging type, and foundry/OSAT supplier.

  Estimate the structure of 2027e global advanced packaging demand through the CoWoS-L, CoWoS-S, and CoWoS-R bookings of customers such as Nvidia, Broadcom, AMD, MediaTek, AWS/Annapurna, Marvell, and GUC.

• Shipment derivationchips per CoWoS wafer

  Use the number of CoWoS allocations and chips per wafer to derive AI GPU, CPU, and ASIC shipments.

  For example, MediaTek's 180k CoWoS-S and 20 chips per wafer imply about 3.6 million TPU v8t ZebraFish units; AMD Venice CPU's 270k CoWoS booking implies about 6.75 million CPUs.

• Market sizingHBM and wafer consumption TAM

  Estimate HBM demand and wafer revenue based on AI chip shipments, HBM capacity, process nodes, and wafer prices.

  The report estimates that 2027e AI HBM demand could reach 50,609mn Gb, and AI wafer revenue TAM could be at least about US$46.4bn.

Asset mapping & comparison

Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).

• TSMC / US.TSM

  Core CoWoS capacity and advanced process supplier

  Strengths

  Combined demand from Nvidia, Google TPU, AMD, AWS, Marvell, and other customers drives growth in CoWoS, 2nm/3nm wafers, and AI-related revenue.

  Weaknesses

  Capacity expansion requires ongoing capital expenditure and is constrained by advanced packaging bottlenecks and customer allocation priorities.

  Comparison

  Compared with the non-TSMC camp, TSMC remains the key capacity source for Nvidia GPUs, Google TPU, and high-end AI ASICs.

  Risks

  CoWoS expansion falling short of expectations, slower-than-expected customer demand, upstream material constraints such as ABF/T-Glass, export controls, and geopolitical risks.

• Nvidia

  TSMC's largest end-demand source for 2027e CoWoS

  Strengths

  Blackwell, Rubin, Rubin Ultra, and Vera CPU together drive CoWoS-L/R demand, and the report expects total CoWoS consumption to grow 57% year over year.

  Weaknesses

  Highly dependent on TSMC CoWoS-L as a single source and on advanced packaging supply.

  Comparison

  Accounts for about 45% of global CoWoS demand in 2027e, significantly above Broadcom and AMD.

  Risks

  Supply chain bottlenecks, changes in product cadence, and volatility in AI data center capex.

• AMD / US.AMD

  A new source of CoWoS demand from AI GPUs and Venice CPUs

  Strengths

  2027e total CoWoS consumption is expected to grow 308% year over year, and Venice CPU may reach 6.75 million units.

  Weaknesses

  AI GPU share and ecosystem still need to compete with Nvidia, and some capacity is handled by the non-TSMC camp.

  Comparison

  2027e CoWoS demand growth is higher than Nvidia and Broadcom, but the absolute scale is still lower than Nvidia.

  Risks

  MI400/MI500 production ramp timing, customer adoption, advanced packaging supply, and competitive pressure.

• MediaTek

  A beneficiary of Google TPU v8t ZebraFish design services and CoWoS-S demand

  Strengths

  The 180k CoWoS-S booking implies about 3.6 million TPU v8t units, and if T-Glass supply improves, shipment assumptions have upside.

  Weaknesses

  Some shipments may be constrained by ABF substrate and T-Glass supply.

  Comparison

  The report names MediaTek as a Top Pick in the Taiwan AI semiconductor supply chain, benefiting from Google TPU TAM growth.

  Risks

  Changes in Google TPU demand, material shortages, and shifts in the division of labor with Broadcom in the TPU program.

• Broadcom

  A source of CoWoS demand related to Google TPU and Meta ASICs

  Strengths

  2027e total CoWoS consumption is expected to reach 484k, up 61% year over year, with TPU v8i SunFish and Ironwood as the core sources.

  Weaknesses

  Demand is concentrated in large cloud-customer ASIC programs, which may see cadence volatility.

  Comparison

  One of the second-largest sources of CoWoS demand in 2027e, second only to Nvidia.

  Risks

  Google/Meta ASIC iteration, CoWoS-S capacity allocation, and cloud capex volatility.

• ASE/SPIL and Amkor

  Beneficiaries of non-TSMC advanced packaging expansion

  Strengths

  By the end of 2027, ASE/SPIL's FoCoS+CoWoS capacity is expected to reach 50kwpm, and Amkor's CoWoS capacity is expected to reach 30kwpm.

  Weaknesses

  Compared with TSMC, they remain subordinate in advanced process access and core customer binding.

  Comparison

  They mainly absorb CoWoS-L and CoWoS-R expansion and serve demand from AMD Venice CPU, Nvidia Vera CPU, AWS Trainium 3, and others.

  Risks

  Ramp yield, customer qualification, order allocation, and capital expenditure recovery risk.

Key data

• TSMC assumed CoWoS capacity at end-2027200kwpmRaised from the previous 170kwpm, implying about 60% year-over-year growth for the global AI XPU industry.
• 2027e global CoWoS total demand2,694k wafersThe table shows total demand rising from 1,394k in 2026e to 2,694k in 2027e, up 93% year over year.
• Nvidia 2027e CoWoS consumption1,222k wafersUp 57% year over year, accounting for about 45% of 2027e total demand; CoWoS-L is about 910k.
• AMD 2027e CoWoS consumption530k wafersUp 308% year over year, mainly from MI455/MI500 and Venice CPU.
• Broadcom 2027e CoWoS consumption484k wafersUp 61% year over year, mainly including Google TPU, Meta MTIAv3, and other ASICs.
• MediaTek 2027e CoWoS consumption180k wafersMainly for Google TPU v8t ZebraFish, implying about 3.6 million units shipped.
• Non-TSMC camp CoWoS capacity at end-202780kwpmASE/SPIL are expected to reach 50kwpm and Amkor 30kwpm, with expansion focused on CoWoS-L and CoWoS-R.
• 2027e AI HBM demand50,609mn GbThe total HBM demand estimate from Exhibit 6 of the report.
• 2027e AI wafer revenue TAMUS$46.4bnThe report table shows 2027e AI wafer revenue TAM of about US$46,418mn.
• TSMC AI-related revenue 2024-29e CAGR60%The report chart title indicates that TSMC AI-related revenue CAGR for 2024-29e could reach 60%.

Impact & implications

In terms of investment implications, the report reinforces the chain transmission of AI training and inference demand from GPUs into CPUs, ASICs, HBM, and advanced packaging. TSMC is at the core because of CoWoS and advanced process nodes; ASE/SPIL and Amkor benefit from non-TSMC advanced packaging expansion; MediaTek and Broadcom benefit from scaled Google TPU deployment; AMD benefits from Venice CPU and the next generation of AI GPUs; and Taiwan supply chain segments such as KYEC, Winway, MPI, and Hon Precision benefit from testing, probe cards, and manufacturing demand.

Risks

• Insufficient supply of CoWoS, ABF substrate, T-Glass, HBM, or advanced process capacity could constrain actual shipments.
• AI data center capex or GPU/ASIC leasing demand coming in below expectations may lead to weaker-than-expected conversion of CoWoS bookings.
• Changes in product cadence at major customers such as Nvidia, Google, AMD, AWS, Microsoft, and Meta will affect the 2027e allocation assumptions.
• Export controls, U.S. Executive Order 14032, U.S. Executive Order 14105, and other compliance restrictions may affect some securities trading or supply chain activities.
• If capacity expansion, yields, and customer qualification at TSMC and the non-TSMC camp fall short of expectations, advanced packaging supply will be affected.
• The report discloses that Morgan Stanley has investment banking or other service relationships with multiple covered companies, and investors should note the potential conflict of interest.

What to watch

• Whether TSMC's CoWoS capacity at the end of 2027 rises as planned to 200kwpm.
• Whether the production ramp and data center revenue growth of Nvidia's Rubin, Rubin Ultra, and Vera CPU meet expectations.
• Whether MediaTek can help Google secure more T-Glass and thereby increase TPU v8t ZebraFish shipments.
• The production ramp and customer adoption of AMD's Venice CPU and MI455/MI500 series.
• Capacity expansion and order allocation at non-TSMC advanced packaging players such as ASE/SPIL, Amkor, and Powertech.
• 2027e HBM supply, pricing, the HBM4/HBM4e adoption cadence, and the supply landscape at Hynix, Micron, and Samsung.
• China AI inference demand, NVIDIA 5090 prices, and AI GPU/ASIC leasing prices as high-frequency demand-side indicators.