Raised TSMC CoWoS Capacity Forecast, Maintain Overweight Rating

Overview

This report updates TSMC's latest developments and forecasts in CoWoS and advanced backend packaging. J.P. Morgan believes TSMC's structural growth drivers remain strong, fueled by accelerating AI computing demand. The report raises CoWoS capacity expectations for 2027 and 2028 and anticipates strong ramp-up for SoIC (System on Integrated Chips). Although CoPoS (panel-level packaging) progress is slower than expected, TSMC can extend its technological leadership by expanding CoWoS reticle size and developing 3D SoIC. Based on this, the firm maintains an 'Overweight' rating on TSMC and raises the December 2026 target price to NT$2500.

Core views

Significant upward revision in capacity forecasts: The firm raises TSMC's year-end 2026/2027/2028 CoWoS capacity expectations to 115k/175k/220k wafers per month (wfpm). Annual CoWoS output is projected to reach 1.1m/1.9m/2.4m wafers in 2026/2027/2028. This revision stems from accelerated internal capacity ramp-up in 2027-2028 and leveraging OSAT (outsourced semiconductor assembly and test) and VIS (Vanguard International Semiconductor) for interposer manufacturing. Meanwhile, SoIC capacity is expected to reach 40k/65k wafers per month by end-2027/2028, driven by ASIC, NVIDIA, and CPO projects adopting 3D SoIC packaging from H2 2027. Key customer dynamics: For NVIDIA, strong Blackwell GB300 orders due to rising computing demand from OpenAI and others, plus better-than-expected Spectrum X and Vera CPU ramp-up in H2 2026, lead to a slight upward revision in 2026 CoWoS forecasts. For AMD, MI450 chip design issues have largely been resolved, with volume production expected by end-2026, prompting a significant upward revision in 2027 CoWoS forecasts to 180k wafers annually, reflecting strong demand for MI450 series and Venice CPUs. For Broadcom and MediaTek, benefiting from Google TPU momentum, projected 2026/2027 total TPU shipments reach 4.5m/8m units, leading to upward revisions in CoWoS forecasts for both companies. Technology roadmap evolution: CoPoS progress is slower than previously expected, remaining in engineering qualification, with supply chain confidence waning about meeting NVIDIA demand by H2 2028. TSMC's 2026 Technology Symposium made no mention of CoPoS, suggesting mass production may be delayed to 2029-2030. Instead, TSMC announced CoWoS reticle size expansion to 14x by 2028 (previously 8-9x) and encouraged customers to migrate to chiplets and 3D SoIC. This 'large-reticle CoWoS + 3D SoIC' combination becomes the mainstream approach in the near-to-medium term to address growing packaging size challenges.

Analysis framework

The firm employs a top-down and bottom-up combined analysis. First, starting from macro AI computing demand, it breaks down GPU/ASIC shipment plans from major cloud service providers (CSPs) and chip designers (NVIDIA, AMD, Broadcom, etc.). Second, through channel checks, it validates customer preferences and migration paths for different packaging technologies (CoWoS-S/L/R, SoIC, CoPoS, EMIB). Finally, incorporating TSMC's capex guidance, fab construction progress (e.g., AP7 Fab), and yield assumptions, it builds a capacity supply model to derive TSMC's market share, revenue contribution, and valuation multiples in advanced packaging.

Methodology notes

• Industry Analysis FrameworkSupply-demand framework

  Advanced Packaging Capacity Supply-Demand Balance Analysis

  By comparing downstream AI chip customer order demand (demand side) with TSMC and OSAT capacity build-out progress (supply side), assessing capacity tightness and pricing trends to evaluate TSMC's pricing power and revenue growth certainty.

• Industry Analysis FrameworkUpstream-Midstream-Downstream Transmission

  Impact of Packaging Technology Iteration on Industry Chain Value Allocation

  Analyzing how the value chain is redistributed among foundries, OSATs, and material suppliers during the evolution from 2.5D CoWoS to 3D SoIC or CoPoS, and how bottlenecks (e.g., HBM4 supply, interposer yield) affect final product ramp-up timing.

• Valuation methodsPE/PEG valuation

  Forward P/E-Based Relative Valuation

  Using 12-month forward P/E as valuation anchor, combined with expected gross margin improvement and growth rate revisions, applying above-historical-average valuation multiples to reflect structural growth premium in the AI era.

Asset mapping & comparison

Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).

• TSMC (2330.TW)

  Core beneficiary, advanced packaging capacity expansion directly drives revenue and profit growth

  Strengths

  Technology leadership, high exclusivity in CoWoS capacity, strong customer stickiness, improving gross margins

  Weaknesses

  Massive capex, slow CoPoS progress may affect long-term cost structure

  Comparison

  Compared to OSATs, controls core high-value segments; compared to Intel, clear yield and customer ecosystem advantages

  Risks

  Risk of AI capex cycle peaking, weak PC/smartphone demand

• NVIDIA (NVDA.US)

  Major demand driver, Blackwell and subsequent products rely on TSMC's CoWoS capacity

  Strengths

  Strong AI GPU demand, GB300 orders exceed expectations

  Weaknesses

  HBM4 supply uncertainty may affect Rubin series ramp

  Comparison

  Absolute dominance in high-end AI training market compared to AMD

  Risks

  Capacity constraints causing delivery delays, intensifying competition

• AMD (AMD.US)

  Growing demand driver, MI450 and Venice CPUs boosting CoWoS demand

  Strengths

  MI450 design issues resolved, strong 2027 volume expectations

  Weaknesses

  Still lags NVIDIA in high-end AI market share

  Comparison

  Gradually narrowing technology gap with NVIDIA but ecosystem barriers remain

  Risks

  Execution risks, intense competition

• ASE (3711.TW)

  Potential beneficiary, securing some CPU and non-core GPU packaging outsourcing

  Strengths

  Winning NVIDIA Vera CPU and some AMD order outsourcing opportunities

  Weaknesses

  No access to highest-end AI GPU core packaging segments

  Comparison

  As OSAT leader,具有一定竞争力 in 2.5D packaging but at lower technology tier than TSMC

  Risks

  Technology iteration lag, lower margins than TSMC

Key data

• 2026E CoWoS Capacity115k wafers/monthYear-end capacity expectation
• 2027E CoWoS Capacity175k wafers/monthYear-end capacity expectation, raised from prior
• 2028E CoWoS Capacity220k wafers/monthYear-end capacity expectation, raised from prior
• 2027E SoIC Capacity40k wafers/monthYear-end capacity expectation
• 2028E SoIC Capacity65k wafers/monthYear-end capacity expectation
• AMD 2027E CoWoS Demand180k wafers/yearSignificantly raised, reflecting MI450 and Venice CPU ramp
• Broadcom 2027E CoWoS Demand425k wafers/yearRaised, benefiting from TPU v8/v9 ramp
• Target PriceNT$2500Based on 20x forward P/E

Impact & implications

For TSMC, continued CoWoS capacity expansion and a clear technology roadmap (extending CoWoS lifecycle + developing 3D SoIC) solidify its monopoly in advanced packaging, helping maintain high gross margins and revenue growth. For customers like NVIDIA and AMD, while facing capacity constraints, TSMC alleviates bottlenecks by expanding reticle size and outsourcing some low-end or non-core processes to OSATs. For OSAT players (e.g., ASE, Amkor), the report notes Vera CPU and some networking chips will be outsourced to OSATs, creating new growth opportunities, but core AI GPU packaging remains firmly in TSMC's hands. Although Intel's EMIB technology has cost advantages, yield remains challenging in high-bridge-count scenarios, making it difficult to challenge TSMC's dominance in the near term.

Risks

• Debate over duration of AI capex growth cycle; downstream demand slowdown could impact utilization rates
• Weak PC and smartphone demand in H2 2026 may negatively affect TSMC's non-AI businesses
• Slow CoPoS progress may lead to long-term cost optimization falling short of expectations
• HBM4 supply shortages could constrain ramp-up of next-gen products like NVIDIA Rubin

What to watch

• Further clarification on CoPoS timeline post TSMC's 2026 Technology Symposium
• Actual shipments and yield performance of NVIDIA Blackwell GB300 and Rubin series
• AMD MI450's ramp-up by end-2026 and 2027 order sustainability
• Google TPU v9's final choice between EMIB or CoWoS-L (expected end-2026)
• OSAT qualification progress in CoWoS-R and 2.5D packaging