AI-Driven Semiconductor Process Revolution: BPD, Wafer Bonding, Glass Substrates, and Photonic SOI Fuel New Material Demand
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AI-Driven Semiconductor Process Revolution: BPD, Wafer Bonding, Glass Substrates, and Photonic SOI Fuel New Material Demand
According to Nomura’s report, surging AI compute demand is pushing semiconductor manufacturing beyond Moore’s Law toward 3D structures and heterogeneous integration. Technologies such as high-NA EUV lithography, backside power delivery (BPD), wafer-bonded NAND, glass substrates, and photonic SOI will drive structural growth in the semiconductor materials market; eight companies—including AEMC, Ingentec, Kinik, and Soitec—are highlighted as key recommendations.
- AI infrastructure and agent-related demand are accelerating semiconductor technology evolution at an unprecedented pace—beyond traditional transistor scaling paths
- 3D transistors (GAA/cFET), backside power delivery (BPD), and system-in-chip (SoIC) have emerged as key growth engines
- High-NA EUV lithography will significantly elevate the value of metal oxide resists (MOR), with unit prices potentially reaching 2–8× those of current EUV resists
- Wafer-bonded NAND and DRAM-on-Logic will substantially increase consumption of silicon wafers, CMP consumables, grinding tools, and bonding equipment
- Glass substrates—offering advantages including low warpage, superior thermal dissipation, and low signal loss—may replace ABF substrates in high-performance computing applications
- Photonic SOI wafers, benefiting from cost advantages and scalability, are poised to become the key enabling material for silicon photonics (SiPh) integrated chips
- The report initiates coverage on AEMC, Ingentec, and Kinik; maintains buy ratings on Soitec, Besi, Dinglong, and Anji; and upgrades GlobalWafers to buy
Report interpretation
Overview
This report is a core executive summary of Nomura Securities’ publication, 'Greater China Semiconductors: A 2026–30 Semiconductor Renaissance Guide.' It argues that explosive AI compute demand is driving a 'process revolution' across the semiconductor industry—shifting its focus from pure transistor scaling (Moore’s Law) toward more complex 3D device architectures (e.g., GAA/cFET), heterogeneous integration (e.g., SoIC), and entirely new manufacturing paradigms (e.g., backside power delivery [BPD], wafer-bonded NAND, glass substrates). This shift will reshape demand patterns for semiconductor materials and equipment, creating structural growth opportunities for related supply chain players.
Core views
The report’s central thesis is that AI chip performance bottlenecks are no longer determined solely by transistor density, but increasingly constrained by power consumption, thermal management, bandwidth, and signal transmission efficiency. As a result, the industry is rapidly adopting a suite of disruptive technologies: First, high-numerical-aperture (high-NA) EUV lithography is critical for next-generation scaling—but its introduction will fundamentally transform the photoresist ecosystem. The report forecasts that metal oxide resists (MOR) will displace current chemically amplified resists (CAR), with unit prices potentially reaching USD 10,000–40,000 per gallon—2–8× those of existing EUV resists (~USD 5,000/gallon)—significantly expanding the total addressable market for resists and ancillary materials. Second, 3D transistors and system-in-chip (SoIC) are becoming mainstream. As metal line-width scaling slows, the industry is turning to stacked transistors (cFET) and hybrid bonding between chips. The report projects TSMC’s SoIC capacity will experience explosive growth during FY2026–27, fueling sharp demand increases for hybrid bonding equipment, CMP, and grinding tools. Third, backside power delivery (BPD) and wafer-bonded NAND represent another major growth driver. BPD requires building power networks on the backside of silicon wafers—doubling silicon wafer usage and increasing demand for bonding, grinding, and CMP steps; meanwhile, wafer-bonded NAND necessitates additional logic wafers, similarly boosting upstream material consumption. Finally, glass substrates and photonic SOI wafers point to future-oriented material directions. Glass substrates—offering exceptional planarity, thermal conductivity, and high-frequency signal integrity—hold strong potential to replace conventional ABF substrates in AI servers; photonic SOI wafers, costing only ~25% of indium phosphide (InP) substrates and compatible with mainstream fabs, are expected to become the preferred material for silicon photonics (SiPh) chips.
Analysis framework
The report employs a 'technology-driven → process-decomposition → material-mapping' analytical framework. First, it identifies several core technology trends spurred by AI demand (e.g., high-NA EUV, BPD, SoIC, glass substrates); second, it conducts deep-dive analysis of how each technology incrementally impacts specific manufacturing processes (e.g., lithography, etching, CMP, bonding, grinding); finally, it precisely maps these process-level changes onto upstream material and equipment suppliers—thereby identifying the most directly exposed and highest-leverage investment candidates. For example, the report deduces that BPD’s requirement for stacking two silicon wafers implies doubling demand for silicon wafers, bonding equipment, grinding wheels, and CMP pads; it then cross-references each company’s market share and technological moat in these niches to arrive at investment recommendations—for instance, upgrading GlobalWafers and Kinik.
Methodology notes
The report’s core logic analyzes how new technologies create new material demand—that is, how supply-side technological shifts (e.g., BPD, SoIC) drive demand-side growth in material volumes.
This is a classic industry analysis methodology—not focused on macro cycles, but rather on the commercialization trajectory of specific technology roadmaps and their downstream ripple effects across the value chain. Based on this framework, the report assesses when emerging materials like glass substrates and photonic SOI will transition from concept to mass production—and quantifies their potential market sizes.
In analyzing the photoresist market, the report emphasizes not only overall volume growth (volume), but also the substantial price uplift (price) driven by technological upgrades.
Volume-price decomposition is a critical method for evaluating the growth potential of materials companies. The report explicitly notes that high-NA EUV introduces not just incremental volume growth, but multi-fold price increases for resists—causing the value growth of this niche segment to far outpace wafer shipment growth—and thereby offering greater profit upside for suppliers like AEMC.
For multiple emerging technologies (e.g., BPD, glass substrates, photonic SOI), the report provides explicit commercialization timelines—such as 'FY2027 as inflection point' and 'acceleration starting FY2028'.
The S-curve model describes the nonlinear diffusion of new technologies—from introduction, through rapid growth, to maturity. By applying this model, the report helps investors identify key technology deployment milestones—enabling better timing of earnings realization and avoiding premature or delayed positioning.
Asset mapping & comparison
Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).
- AEMC (4749 TT)Taiwan’s leading supplier of photoresist ancillary materials, actively expanding into photoresist (PR) itself—directly benefiting from high-NA EUV adoption
- Strengths
- Primary rinse solution supplier for TSMC’s N2 node, with stable market share; entering KrF BARC market to challenge DuPont’s dominance
- Weaknesses
- Has not yet achieved mass production of high-end resists (e.g., ArF), still reliant on imports
- Comparison
- AEMC’s revenue CAGR (2020–25) stands at 23%, significantly higher than TOK’s 9%, reflecting superior growth profile
- Risks
- Risk of qualification loss at TSMC; failure to supply high-end products such as BARC and photoresists
- Ingentec (4768 TT)Taiwan-based specialty gas supplier, concurrently developing TGV (through-glass via) technology for glass substrates—positioned to benefit from triple convergence of BPD, wafer bonding, and photonic SOI trends
- Strengths
- Stable market share in etch gases; has mastered core TGV laser drilling technology and secured validation from major customers such as Broadcom
- Weaknesses
- Glass substrate business remains early-stage, facing uncertainties around yield, cost, and customer adoption
- Comparison
- Differentiates from global giants Schott and AGC by focusing on TGV process expertise—not glass substrate material supply
- Risks
- Slower-than-expected commercialization of glass substrates; specialty gas business subject to semiconductor capex cycles
- Kinik (1560 TT)World-leading supplier of CMP pad conditioners (DBU), and also a leader in silicon wafer recycling (SBU) and grinding wheels (ABU)—directly benefiting from increased CMP steps driven by BPD, SoIC, and other new processes
- Strengths
- Approximately 80% DBU market share at TSMC’s N2 node, tightly aligned with key customers; grinding wheel business offers enormous potential, with comparable market size to DBU
- Weaknesses
- Grinding wheel business remains nascent, not yet qualified by top OSATs
- Comparison
- Competes head-to-head with Asahi Diamond and 3M in the global CMP pad conditioner market, while Disco dominates the grinding wheel space where Kinik is expanding
- Risks
- Risk of qualification loss at TSMC; failure to secure design wins with OSAT manufacturers
Key data
- High-NA EUV Photoresist PriceUSD 10,000–40,000/gallonExpected to be 2–8× current EUV resist prices (USD 5,000/gallon), primarily due to material upgrade to metal oxide resists (MOR)
- Glass Substrate ASP (Post-Mass Production)USD 400/unitCurrent trial-production ASP exceeds USD 1,500; target ASP post-mass production is USD 400 to achieve cost competitiveness
- Global 12-inch Silicon Wafer Annual Demand Growth (FY2026–30)~10% / yearBaseline growth ~5% + wafer fab expansion contributes 2–3pp + wafer-bonded NAND adds 1–2pp + BPD/photonic SOI contributes 0–1pp
Impact & implications
The report contends that this AI-driven semiconductor process revolution will profoundly reshape value distribution across the Greater China—and global—semiconductor supply chain. Historically, semiconductor process equipment (SPE) vendors captured the largest benefits from technological transitions, while materials suppliers remained relatively passive. However, in this cycle, materials themselves have become technical bottlenecks (e.g., high-NA EUV resists, BPD wafers, TGV-enabled glass substrates), elevating both technical barriers and value-added content. Consequently, materials companies with breakthrough capabilities (e.g., AEMC, Ingentec, Kinik) stand to gain stronger pricing power and longer profitability horizons—shifting their valuation logic from traditional cyclical stocks toward growth stocks.
Risks
- Commercialization of high-NA EUV lithography lags expectations, delaying photoresist upgrades
- Technical bottlenecks—including yield, cost, and coefficient-of-thermal-expansion matching—delay mass production of glass substrates
- A downturn in global semiconductor capex weakens procurement willingness for upstream materials
What to watch
- TSMC’s SoIC capacity ramp-up progress (FY2026–27 as critical observation window)
- Broadcom’s actual adoption timeline for glass substrates (earliest commercial use expected in FY2027)
- Evolution of supply-demand imbalance for InP substrates and photonic SOI wafers (tightest period anticipated FY2025–27)