Intel EMIB-T could become a second source, but TSMC CoPoS is still likely to maintain its advanced packaging leadership

Overview

This report compares Intel EMIB-T and TSMC CoPoS, two next-generation advanced packaging platforms, and discusses their technological structures, performance, manufacturing challenges, scalability, costs, and supply-chain implications for AI/HPC accelerators. The report's core conclusion is that the emergence of EMIB-T is more a validation of the structural growth opportunity in advanced packaging than a fundamental disruption to TSMC's leadership. TSMC CoPoS is expected to enter volume production in 2028, while Intel EMIB-T is expected to enter volume production in H227-2028. The two may coexist over the long term, serving different customers' needs for performance, cost, and supply-chain diversification.

Core views

UBS believes EMIB-T and CoPoS are both credible next-generation advanced packaging routes, but their optimization objectives differ. Through embedded silicon bridges, elimination of the full interposer, and direct construction on large-size substrates, EMIB-T offers cost and ultra-large-package scalability advantages and could become an important second source for some hyperscaler ASICs. CoPoS, supported by its interposer architecture, interconnect density, signal integrity, power integrity, 3D stacking, embedded capacitors, and future CPO integration, remains better suited to customers seeking maximum performance and execution certainty. The report expects TSMC to retain its advanced packaging leadership, with approximately 65%-70% market share in 2030E under the stress case and approximately 62% even under the low case in which Intel EMIB-T is more successful.

Analysis framework

The report uses technology decomposition, feedback from experts and equipment suppliers, comparisons of manufacturing execution risks, cost and scalability analysis, and 2030E market-share stress testing. Analytical dimensions include packaging architecture, package-level performance, key manufacturing bottlenecks, ultra-large-package scaling, cost structure, customer adoption timelines, and supply-chain beneficiaries.

Methodology notes

• Technology comparisonFive-dimensional competitive analysis of EMIB-T vs CoPoS

  Compare next-generation advanced packaging platforms across structure, performance, manufacturing challenges, scalability, and cost.

  The core difference of EMIB-T is the removal of the full silicon interposer and embedding of silicon bridges into the substrate; the core difference of CoPoS is the transition from the wafer format of CoWoS to a panel format while retaining the high-performance interposer ecosystem.

• Scenario analysis2030E advanced packaging market-share stress test

  Estimate TSMC advanced packaging revenue CAGR and market share under different levels of Intel EMIB-T adoption.

  The stress case assumes Intel reaches US$16bn in EMIB-T sales and 13% industry share by 2030E; the low case assumes Intel reaches 18% share to assess TSMC's downside risk.

• Supply-chain analysisMapping advanced packaging capex and beneficiaries

  Volume-production expansion of CoPoS and EMIB-T will create a new capex cycle for equipment, ABF/glass substrates, and OSAT.

  The report identifies equipment suppliers, ABF and glass-core substrate manufacturers, and OSAT partners as beneficiaries, and mentions Ibiden, Unimicron, GPTC, Chroma, ASMPT, and Gudeng.

Asset mapping & comparison

Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).

• TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD (US.TSM)

  Advanced packaging leader and primary CoPoS driver

  Strengths

  Leading process technology; a technology portfolio spanning CoWoS, CoPoS, 2.5D, 3D, and CPO; a strong customer ecosystem; and a track record of high-volume manufacturing execution. CoPoS offers advantages in interconnect density, signal integrity, power integrity, and system-level performance.

  Weaknesses

  CoWoS capacity remains tight; CoPoS must address panel-level process uniformity, warpage, and the maturity of the new equipment chain; ultra-large package scaling remains technically challenging.

  Comparison

  Compared with Intel EMIB-T, TSMC CoPoS is more focused on performance and integration capabilities, but may be less straightforward in terms of cost and extremely large package scaling.

  Risks

  Broader adoption of Intel EMIB-T by hyperscaler ASICs, supply-chain diversification pressure, or delays or disappointing yields in CoPoS volume production.

• INTEL CORP (US.INTC)

  EMIB-T technology provider and potential second source

  Strengths

  The EMIB-T architecture is simpler, eliminating the full interposer and potentially reducing structural costs while improving scalability for ultra-large packages; TSV vertical power delivery could support HBM4 and higher-power AI chips.

  Weaknesses

  EMIB-T still needs to prove high-volume manufacturing yields; current substrate yield is approximately 50%, while integration responsibility, coordination between foundry and back-end processes, and yield-responsibility allocation remain challenges.

  Comparison

  Compared with TSMC CoPoS, Intel EMIB-T is more focused on cost, scalability, and second-source value, but may lag in package-level performance, interconnect density, ecosystem maturity, and execution track record.

  Risks

  An unsuccessful volume ramp, failure to reach high-volume manufacturing yield levels, limited customer adoption, and valuation pressure.

• Ibiden

  Key substrate partner for Intel EMIB/EMIB-T

  Strengths

  Has supported Intel EMIB substrates for many years and announced a ¥220.0bn capex expansion to support EMIB-T.

  Weaknesses

  EMIB-T substrate manufacturing involves silicon-bridge cavities, TSVs, precision placement, and large-size substrates, resulting in a steep learning curve.

  Comparison

  Compared with general ABF suppliers, Ibiden stands to benefit more directly from the EMIB-T route.

  Risks

  EMIB-T adoption speed, yield improvement, and customer volume-production timelines falling short of expectations.

• Unimicron

  Beneficiary of ABF and advanced substrates

  Strengths

  Higher advanced-packaging substrate content benefits ABF substrate suppliers.

  Weaknesses

  Exposed to the industry capex cycle and customers' technology-route choices.

  Comparison

  Like Ibiden, Unimicron benefits from increased substrate content, but the extent of the benefit depends on customers and technology routes.

  Risks

  Slower advanced packaging demand, yield or pricing pressure, and fluctuations in capacity utilization.

• All Ring

  Beneficiary of CoPoS/EMIB-T equipment capex

  Strengths

  Initiated at Buy with a target price of NT$1,550. The report believes the new advanced packaging capex cycle could create opportunities.

  Weaknesses

  Specific orders and customer timelines depend on the volume-production progress of CoPoS and EMIB-T.

  Comparison

  Along with GPTC, Chroma, ASMPT, and Gudeng, it is among the equipment-related beneficiaries favored by the report.

  Risks

  Delays in equipment qualification, capex below expectations, and changes in customer volume-production timelines.

Key data

• Advanced packaging TAMUS$19bn in 2026E to US$122bn in 2030EThe report estimates a corresponding 59% CAGR, driven primarily by demand for Cloud AI accelerators.
• TSMC advanced packaging market share under the stress case65%-70% by 2030EAssumes Intel EMIB-T reaches US$16bn in sales and 13% industry share by 2030E, supporting approximately 24mn AI accelerator dies or approximately 6mn chipsets.
• TSMC advanced packaging market share under the low case62% by 2030EAssumes Intel EMIB-T is more successful and Intel reaches an 18% share of the advanced packaging market by 2030E.
• TSMC advanced packaging revenue growth50% CAGR in 2026-30E; lower case 47% CAGRGrowth remains high under the stress case but declines slightly under the low case due to stronger Intel adoption.
• TSMC advanced packaging sales mix9% in 2026E to 18% in 2030E; lower case 16% in 2030EShows the increasing importance of advanced packaging to TSMC's revenue mix.
• EMIB-T volume-production timelineH227-2028The report states that Intel EMIB-T development is slightly ahead, with Google TPU v9 potentially becoming the first major external product.
• CoPoS volume-production timeline2028The report expects Nvidia Feynman to potentially become the first CoPoS customer in H228-2029, followed by AMD and ASIC customers in 2029-30.
• Current EMIB-T yield indicationssubstrate yields around 50%; packaging yields about 90%; validation yields around 90%-92%The report emphasizes that HPC products ideally require packaging yields to improve to the high-90% range.
• Ibiden EMIB capacity expansion¥220.0bn capex planIbiden announced in February 2026 that it would expand EMIB capacity, particularly EMIB-T capacity, targeting volume production in FY28.

Impact & implications

From an investment perspective, the report remains bullish on TSMC's long-term position in Cloud AI and advanced packaging, believing that even successful EMIB-T volume ramp-up would more likely lead to market diversification than a winner-take-all outcome. Successful Intel EMIB-T ramp-up would help improve foundry sales and profitability, but UBS maintains a Neutral rating due to valuation. Across the supply chain, CoPoS and EMIB-T could both initiate a new capex cycle, benefiting equipment, ABF/glass-core substrates, and OSAT partners.

Risks

• If Intel EMIB-T improves yields faster than expected, it could achieve higher adoption among hyperscaler ASICs and reduce TSMC's advanced packaging market share.
• If TSMC CoPoS panel-level processing, warpage control, equipment readiness, or volume-production schedule falls short of expectations, its performance and execution advantages would weaken.
• Current EMIB-T substrate yield is approximately 50%; if it cannot improve to commercially viable levels, the cost advantage could be offset by low yields.
• Advanced packaging customers could accelerate supply diversification due to TSMC capacity constraints and geopolitical factors, changing order allocation.
• If Cloud AI accelerator demand falls short of expectations, it would affect the advanced packaging TAM, supply-chain capex, and valuations of related companies.

What to watch

• Improvements in substrate yield and packaging yield during Intel EMIB-T's volume ramp in H227-2028.
• Whether Google TPU v9, subsequent TPU v10, and related MediaTek projects adopt EMIB-T or shift to CoPoS.
• TSMC's 2028 CoPoS volume-production milestone, Nvidia Feynman's adoption timeline, and the adoption pace among AMD/ASIC customers in 2029-30.
• Progress in TSMC's migration from 310x310mm² panels to 510x515mm² panels, and the impact on cost, yield, and capacity efficiency.
• Order realization for equipment, ABF, glass-core substrates, and OSAT driven by CoPoS and EMIB-T.