AMD strengthens differentiated AI inference positioning through Taalas, while storage and analog chip conditions improve in tandem
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AMD strengthens differentiated AI inference positioning through Taalas, while storage and analog chip conditions improve in tandem
The report believes Taalas's model-hardwired chips can alleviate memory bottlenecks in inference, while KV cache, CXL, and high-bandwidth flash will reshape storage demand, and the analog chip industry has entered a clearer cyclical recovery phase.
- Taalas directly hardwires trained model weights into the chip structure, eliminating the need to repeatedly read weights from external memory and allowing more on-chip SRAM to be used for dynamic tasks such as KV cache and context processing.
- This architecture is expected to deliver higher performance per watt and lower cost in specific high-capacity inference scenarios, but each new model typically requires the chip to be redesigned.
- SNDK estimates that by 2030, persistent KV cache capacity demand could approach 1ZB, equivalent to more than 70% of the industry's expected bit supply in 2027, creating a potential tailwind for future NAND supply-demand and pricing.
- CXL-pooled DRAM is expected to improve memory utilization in hyperscale data centers and extend the useful life of existing memory technologies such as DDR4.
- Analog chips are in a clear recovery phase: second-quarter revenue for companies that have reported results was on average 1.7% above expectations, third-quarter revenue forecasts were raised by an average of 1.6%, and 2026 and 2027 revenue forecasts were raised by approximately 1.5% and 3%, respectively.
- UBS continues to view TXN as its top pick in analog chips, mainly based on the combination of market share gains, fixed-cost leverage, and a strong upcycle.
Report interpretation
Overview
This report focuses on three main themes in the U.S. semiconductor industry: the significance of AMD's acquisition of Taalas for differentiated AI inference architecture, the impact of AI workloads on future memory and storage systems, and the cyclical recovery reflected in the second-quarter 2026 analog chip earnings season. The report's overall view is positive: dedicated inference chips may improve efficiency by reducing data movement, KV cache and memory pooling will significantly expand demand for storage and interconnect, and revenue revisions, end demand, and pricing trends in the analog chip industry are all improving.
Core views
First, by directly hardwiring model weights into silicon structures, Taalas fundamentally reduces weight reads during inference and addresses memory bottlenecks more aggressively than GPUs or SRAM-centric architectures. AMD can use its chip R&D, supply chain, and customer relationships to drive commercialization of this technology at scale and expand its custom compute product portfolio. Second, the continued growth of KV cache may become an important incremental driver of SSD and NAND demand; meanwhile, CXL-pooled DRAM, optically interconnected disaggregated memory, and high-bandwidth flash are expected to improve utilization of expensive GPUs. Third, the analog chip industry has passed the cyclical bottom, with improving demand in industrial, data center, and automotive markets, and price increases beginning to become a tailwind for revenue and profit, although the MCU recovery still lags significantly.
Analysis framework
The report combines transaction and technology architecture analysis, industry conference observations, supplier theoretical performance data, company quarterly results and consensus estimate revisions, as well as comparisons of cyclical positioning across automotive, industrial, data center, and product categories. The valuation section uses methods such as P/E ratios and enterprise value to free cash flow multiples depending on the company, combined with assessments of macro, technology, competitive, and end-market risks.
Methodology notes
Compare the data movement methods of GPUs, SRAM-centric chips, and chips with hardwired model weights.
GPUs need to repeatedly read model weights from external HBM; large-capacity SRAM architectures can reduce data movement, but weights are still stored as data; Taalas instead hardwires weights into transistor structures, thereby eliminating weight reads and freeing SRAM for dynamic inference tasks.
Compare potential capacity demand for persistent KV cache with NAND industry bit supply and capacity allocation priorities.
If demand for persistent KV cache approaches the scale estimated by SNDK, while new cleanroom capacity is prioritized for HBM and DDR, incremental NAND supply may struggle to fully match demand, thereby improving supply-demand dynamics and pricing.
Summarize the magnitude of quarterly revenue beats, next-quarter forecast changes, and annual revenue revisions.
Assess the breadth of the industry recovery across three dimensions: companies, end markets, and product categories, and compare the positions of automotive, industrial, analog chips, and MCUs relative to long-term trend lines.
Select relative valuation methods based on different companies' earnings and cash flow characteristics.
The report states that P/E ratios and enterprise value to free cash flow multiples can be used for valuation, with ADI valued using a next-twelve-month P/E ratio and TXN using an enterprise value to free cash flow multiple.
Asset mapping & comparison
Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).
- AMDAcquired Taalas to expand model-specific AI inference and custom compute capabilities.
- Strengths
- Has chip design R&D, supply chain scale, customer relationships, and a diversified compute product portfolio, which can help commercialize Taalas's technology.
- Weaknesses
- The model-hardwired architecture has low flexibility; each model update typically requires a new chip, which may limit applicable scenarios.
- Comparison
- Compared with GPUs and SRAM-centric architectures, this approach can further reduce weight data movement, but it is less general-purpose.
- Risks
- Integration execution, technology volume production, customer adoption, rapid model iteration, and competition with other inference architectures.
- SNDKA major potential beneficiary and technology advocate of KV cache and high-bandwidth flash trends.
- Strengths
- Persistent KV cache could generate huge NAND demand, and high-bandwidth flash is expected to improve GPU utilization and capital efficiency.
- Weaknesses
- The disclosed performance and capacity data are mainly theoretical estimates, and key modeling assumptions are incomplete.
- Comparison
- High-bandwidth flash alleviates the capacity constraints of pure-HBM configurations with greater capacity, but performance, latency, and deployment costs still need real-world validation.
- Risks
- AI demand below expectations, NAND supply expansion, product rollout delays, and theoretical performance failing to be replicated in real workloads.
- MRVLBenefits from demand related to CXL memory pooling, optically interconnected disaggregated memory, and high-speed SRAM.
- Strengths
- Has CXL solutions, optical interconnect capabilities obtained through the Celestial AI transaction, and high-bandwidth-density SRAM intellectual property.
- Weaknesses
- New disaggregated memory architectures are still in development, and commercial scale and deployment pace remain unclear.
- Comparison
- Its solution can extend memory beyond the rack while seeking to maintain an architecture experience close to local memory.
- Risks
- Standards evolution, customer in-house development, deployment complexity, and fluctuations in data center capital expenditure.
- TXNA key beneficiary of the analog chip upcycle and UBS's top pick in the sector.
- Strengths
- Market share gains, fixed-cost leverage, upward revenue forecast revisions, and industry price increases provide combined support.
- Weaknesses
- High capital investment and strong cyclicality amplify the impact of demand changes on earnings.
- Comparison
- Its 2026 revenue forecast revision ranks among the highest of the companies covered in the report.
- Risks
- Technological changes, intense competition, pricing pressure, excessive capital investment, and cyclical fluctuations in end markets.
- Analog chip industryImproving industrial, automotive, and data center demand is driving the industry recovery.
- Strengths
- Quarterly results and forecasts have been broadly revised upward, data centers offer structural growth, and price increases are beginning to become a tailwind.
- Weaknesses
- Recovery varies across products and end markets, and MCUs remain significantly below the long-term trend.
- Comparison
- Analog chips excluding MCUs have returned above the long-term trend line, while automotive, industrial, and MCUs remain in varying stages of recovery.
- Risks
- Macro downturn, slowing automotive demand, renewed inventory build-up, trade disruptions, and price competition.
Key data
- Potential persistent KV cache capacityApproximately 1ZBSNDK's estimate for around 2030; the report notes that it did not disclose key assumptions such as concurrent session retention time, cache miss rate, and KV size per token.
- KV cache demand relative to industry supplyMore than 70%Approximately 1ZB of demand is equivalent to more than 70% of the industry's expected bit supply in 2027.
- High-bandwidth flash configuration efficiencyApproximately 8x capital efficiency, approximately 2x GPU efficiencyBased on SNDK's theoretical modeling; 4 GPUs configured with high-bandwidth flash can achieve roughly the same token throughput as 8 pure-HBM GPUs.
- Analog chip second-quarter revenue beat1.7%Aggregated for companies that have reported results.
- Analog chip third-quarter revenue forecast increase1.6%Aggregated for companies that have reported results.
- 2026 and 2027 revenue forecast revisionsApproximately +1.5%/+3%Changes in full-year revenue forecasts for covered analog chip companies.
- 2026 revenue forecast revisions for TXN and ALGM+2.6%/+2.2%These two companies had the largest revisions among the companies covered in the report.
- 2026 automotive business revenue forecast revisionApproximately +2%Industrial business forecasts were broadly unchanged, while other end markets were raised by approximately 0.5%.
- Position relative to long-term trend lineAutomotive and industrial approximately 7% below, MCU approximately 13% belowAnalog chip revenue excluding MCUs has moved above the long-term trend line based on third-quarter guidance.
- MRVL on-chip SRAM bandwidth densityApproximately 17xMRVL stated that the bandwidth per square millimeter of its internal related intellectual property is approximately 17 times that of industry alternatives.
Impact & implications
For AMD, Taalas adds a model-specific inference path distinct from general-purpose GPUs, helping expand its custom compute product portfolio and potentially creating advantages in scenarios where models are stable, call volumes are high, and power consumption and cost are sensitive. For the storage industry, KV cache, CXL-pooled memory, and high-bandwidth flash may increase demand for NAND, SSDs, DRAM interconnects, and controllers, while improving utilization of expensive GPUs. For the analog chip industry, cyclical recovery, structural data center growth, and price increases above cost inflation are jointly improving the earnings outlook, but the recovery in MCUs and some end markets remains uneven.
Risks
- The Taalas architecture requires chip redesign for new models, which may limit its flexibility and increase iteration and tape-out costs.
- KV cache capacity and high-bandwidth flash efficiency data mainly come from supplier estimates or theoretical modeling, with some key assumptions undisclosed.
- There is uncertainty in capacity allocation among HBM, DDR, and NAND, and supply expansion may change the expected logic of price upside.
- Macroeconomic downturn, international trade disruptions, and weak end demand may weigh on the semiconductor industry recovery.
- New technologies or business models may change chip shipment volumes, average selling prices, and revenue mix.
- The analog chip industry faces intense competition, high capital investment, pricing pressure, and cyclical end-market demand risks.
- Changes in EV penetration speed, industrial demand, and data center capital expenditure may cause companies' earnings forecasts to fluctuate in both directions.
- AMD's actual progress in integrating Taalas, volume production of the technology, and customer onboarding may fall short of expectations.
What to watch
- AMD's product roadmap after completing the Taalas acquisition, the timing of the first chip tape-out, and customer adoption.
- Whether the Taalas solution can validate its performance-per-watt and cost advantages in real high-capacity inference workloads.
- Key assumptions for persistent KV cache such as session retention time, cache miss rate, token rate, and storage per token.
- Whether incremental NAND capacity remains constrained due to priority expansion of HBM and DDR, and changes in SSD prices.
- The deployment pace of CXL-pooled DRAM and optically interconnected disaggregated memory in hyperscale data centers.
- Measured throughput, latency, capital efficiency, and synergy with HBM systems for high-bandwidth flash.
- Subsequent revenue forecasts, gross margins, price increase magnitude, and inventory levels of analog chip companies.
- The speed at which automotive, industrial, and MCU revenue returns to the long-term trend line.
- Whether TXN's market share gains and fixed-cost leverage can materialize as expected.