The Three Musketeers of AI Packaging: CoWoS, CPO, and WoW Fuel New Growth in the Semiconductor Industry

Overview

This research report focuses on AI‑driven packaging innovations in the Greater China semiconductor industry, with a particular emphasis on three major technological trends: CoWoS (Chip on Wafer on Substrate), CPO (Co-Packaged Optics), and WoW (Wafer on Wafer). Morgan Stanley argues that as AI evolves from inference‑centric to action‑oriented (Agentic AI), demands for computing power, bandwidth, and energy efficiency continue to rise, making advanced packaging both a critical bottleneck and a key growth driver. The report forecasts that the global semiconductor market will reach US$1.5 trillion by 2030, with AI‑related semiconductors accounting for roughly half of this total. TSMC, as a primary beneficiary, is expected to see its AI‑related revenues grow at a compound annual growth rate of 60%, while CoWoS capacity is set to expand significantly. Moreover, CPO technology—capable of substantially boosting data‑transfer speeds and reducing power consumption—is regarded as pivotal for next‑generation interconnects, with substantial market potential.

Core views

Demand Side: AI‑driven capital spending remains robust, with global cloud service provider (CSP) capex projected to approach US$811 billion by 2026. The total addressable market (TAM) for AI semiconductors is expected to reach US$485 billion by 2026. As AI applications evolve from purely inference‑based use cases toward more sophisticated agentic AI, greater reliance on tool invocation and action execution will drive an increased share of CPUs within server clusters. Accordingly, the report revises the baseline TAM estimate for Orchestration CPUs upward from US$60 billion to US$79 billion by 2030, with potential reaching as high as US$238 billion under a bullish scenario. Supply Side and Technological Trends: 1. CoWoS Capacity Expansion: TSMC leads in CoWoS technology, with capacity for both CoWoS and SoIC set to double by 2025 and sustain this growth through 2026. By 2027, TSMC’s CoWoS capacity could expand to 165,000 wafers per month (kwpm). Meanwhile, non‑TSMC players such as Amkor, ASE, and UMC are also expanding their capabilities, though at a smaller scale. NVIDIA remains the largest user of CoWoS, projected to consume 875,000 wafers in 2026—accounting for over 60% of TSMC’s CoWoS allocation. 2. The Rise of CPO: As transmission speeds continue to increase, traditional pluggable optical modules face mounting challenges related to power consumption and signal loss. CPO integrates the optical engine directly with ASICs or GPUs, significantly reducing power draw—from approximately 14 W at 800G down to 5 W—while boosting bandwidth density. The report forecasts a CAGR of 172% for the CPO market between 2023 and 2030, with the market size projected to reach US$9 billion by 2030. Broadcom has already begun mass‑producing CPO solutions for switching platforms, while NVIDIA’s Rubin server rack system is expected to become the first XPU‑based solution to adopt CPO. In terms of supply chain partnerships, FOCI, TSMC, and SPIL are identified as key collaborators supporting NVIDIA’s Rubin platform. 3. WoW and 3D Integration: WoW technology enables direct stacking of DRAM atop the SoC, further shortening interconnect lengths and enhancing performance compared to 2.5D CoWoS. This represents a critical pathway for future high‑performance computing. 4. Competitive Landscape: Although Intel’s EMIB technology holds promise for supporting ultra‑large chips exceeding 12 times the standard photomask size, TSMC’s CoWoS currently accommodates up to 9.5 times the standard photomask dimension and enjoys distinct advantages in yield and ecosystem maturity. Scaling package dimensions is an unmistakable industry trend, driven by the need to integrate additional HBM and logic dies. Financial Implications: TSMC’s revenue contribution from AI‑related semiconductors is expected to surge from low single digits in 2023 to over 40% by 2029. Margins—both gross and EBITDA—are anticipated to improve as the share of high‑value AI products grows, with EBITDA margin projected to exceed 80% by 2028.

Analysis framework

Institutional analysts employ a hybrid top-down and bottom-up analytical approach. First, by tracking capital expenditure data from the world’s leading cloud service providers (the Top 11 CSPs), they construct a macro‑demand model to forecast the overall market size for AI servers and AI semiconductors. Second, at the micro‑level of the industry chain, they dissect the capacity plans, technology roadmaps—such as CoWoS version iterations and the timeline for CPO adoption—and supply‑chain allocations of key players like TSMC, NVIDIA, and Broadcom. By developing a detailed Wafer Demand Table, they quantify the share of demand across different packaging technologies (CoWoS‑L/S/R) attributable to various customers, including NVIDIA, AMD, and Broadcom. Finally, drawing on technological evolution—such as power‑consumption comparisons from pluggable to LPO and then to CPO, and the increasing integration levels from 2.5D to 3D WoW—they identify which technology pathways are likely to become mainstream, thereby assessing the market share and revenue‑growth potential of relevant suppliers.

Methodology notes

• Industry/ Sector Analysis FrameworkSupply-and-Demand Framework

  By analyzing cloud vendors’ capital expenditures (demand) and TSMC’s and packaging-and-testing firms’ capacity expansions (supply), we can forecast industry cyclicality and identify key bottlenecks.

  The research report first establishes the robust growth of AI Capex as the cornerstone of demand, then meticulously tracks TSMC’s quarterly and annual capacity expansion plans for its CoWoS technology, thereby assessing when the supply-demand gap will ease and which segments stand to benefit most.

• Industry/ Sector Analysis FrameworkDownstream, midstream, and upstream transmission within the industrial chain

  We map out the entire value chain, from CSP to GPU/ASIC design, foundry services, OSAT and packaging materials, to test equipment.

  The report not only focuses on TSMC but also provides a detailed breakdown of the CPO supply chain, including components such as FOCI (optical fiber arrays), SPIL/ASE (packaging), and Fabrinet (assembly), illustrating how value is distributed and transmitted throughout the industry.

• Company Fundamentals and Financial FrameworkVolume-price decomposition

  We decompose TSMC’s AI revenue growth into two drivers: “wafer volume” and “average selling price/product mix (ASP/Mix).”

  The research report notes that TSMC’s robust growth in AI-related revenue stems both from the exponential increase in CoWoS wafer shipments (volume) and from the higher value-added of AI chips themselves, as well as the premium commanded by advanced packaging (price/structural optimization), thereby driving up gross margins.

Asset mapping & comparison

Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).

• TSMC (2330.TW)

  A core beneficiary, it is the undisputed leader in AI‑driven semiconductor manufacturing and advanced packaging technologies such as CoWoS and SoIC.

  Strengths

  Technologically advanced, rapidly expanding production capacity, and strong customer stickiness (NVIDIA, AMD, Broadcom).

  Weaknesses

  Significant capital expenditures and geopolitical risks.

  Comparison

  Compared with Intel, TSMC enjoys a distinct advantage in yield rates and ecosystem development; compared with Samsung, TSMC began its advanced packaging initiatives earlier.

  Risks

  AI demand has fallen short of expectations, raising the risk of overcapacity in the long term.

• NVIDIA (NVDA.O)

  The primary demand driver—its GPUs and Rubin architecture—are fueling demand for CoWoS and CPO technologies.

  Strengths

  Dominance in the AI chip market and barriers to entry in the software ecosystem.

  Weaknesses

  Relying on TSMC’s production capacity, it faces competition from AMD and custom ASICs.

  Comparison

  Compared with AMD, NVIDIA holds an overwhelming share in the high-end AI training market.

  Risks

  Intensified competition and export controls.

• Broadcom (AVGO.O)

  A pioneer in CPO technology, the company has already achieved mass production of CPO chips for switches and is also a major user of CoWoS.

  Strengths

  The company holds a leading position in network chips and boasts strong capabilities in custom ASIC design.

  Weaknesses

  It lags behind NVIDIA in the general-purpose GPU segment.

  Comparison

  It is ahead of other network chip vendors in the pace of CPO implementation.

  Risks

  Capital expenditures for data centers are volatile.

• ASE / SPIL (3711.TW)

  Supply chain partner. It is involved in the CPO packaging and testing of NVIDIA’s Rubin system and also serves as a key supplier of non-TSMC CoWoS capacity.

  Strengths

  The world’s largest packaging and testing facility, benefiting from economies of scale.

  Weaknesses

  Gross margins are typically lower than those of TSM.

  Comparison

  Competing with Amkor for advanced packaging orders that are not tied to TSMC.

  Risks

  TSMC’s internal expansion of packaging capacity is squeezing the outsourced market share.

• FOCI (3363.TWO)

  A key component of the CPO supply chain, it provides fiber array units (FAUs), which are the core passive components of CPO modules.

  Strengths

  Possesses technical expertise in the FAU field and has entered NVIDIA’s supply chain.

  Weaknesses

  The company is relatively small in scale, with a risk of over-reliance on a single customer.

  Comparison

  Compared with traditional optical module manufacturers, FOCI is more focused on the precision passive components required for CPO.

  Risks

  The adoption of CPO has been slower than expected, and the technology roadmap has undergone a change.

Key data

• Global Semiconductor Market Size in 2030US$1.5 trillionAmong them, AI semiconductors account for approximately 50%.
• 2026 AI Semiconductor TAMUS$485 billionBull Market Assumptions Based on Supply Chain Data
• TSMC’s AI revenue CAGR (2024–2029E)60%Far exceeding the overall growth rate of the semiconductor industry.
• TSMC’s CoWoS capacity (2027E)165 kwpm1,000 wafers per month, representing a substantial expansion compared to 2023.
• CPO Market CAGR (2023–2030E)172%The market size is projected to reach US$9 billion by 2030.
• Orchestration CPU TAM (2030e Base Case)US$79 billionPreviously forecast at USD 60 billion, the estimate has been revised upward due to the Agentic AI trend.
• NVIDIA’s 2026 CoWoS Wafer Demand875,000 unitsAccounting for approximately 60% of TSMC’s total CoWoS allocations.

Impact & implications

For TSM, AI packaging is not only a driver of revenue growth but also a key enabler of sustained high profit margins. As CoWoS and SoIC production capacity comes online, TSM’s dominant position in the AI supply chain will be further reinforced. For packaging and testing firms such as ASE, SPIL, and Amkor, while TSM’s internal expansion of packaging capacity may intensify competition, the overall market size is expanding, and outsourcing demand from non‑TSM players—such as certain Intel and AMD products—continues to offer growth opportunities, particularly in CPO assembly and testing. For optical‑communication vendors like FOCI, securing a place in NVIDIA’s Rubin supply chain represents a substantial incremental market. From an investor perspective, the focus should be on companies that either hold exclusive supply capabilities or command significant market shares at the CoWoS, CPO, and WoW technology nodes.

Risks

• AI capital expenditure growth may slow or fall short of expectations.
• Geopolitical tensions could disrupt supply chains or lead to the escalation of export controls.
• The yield ramp-up of new technologies (such as CPO and WoW) is slow, or their costs are excessively high.
• Intensified industry competition has triggered price wars, squeezing profit margins.
• Macroeconomic downturns are impacting corporate IT spending.

What to watch

• The actual capacity utilization and expansion progress of TSMC’s CoWoS and SoIC technologies.
• The launch of NVIDIA’s Rubin architecture and the final confirmation of its CPO supply-chain roster.
• Capital expenditure guidance for major cloud service providers (CSPs) for 2026–2027.
• The yield improvement of Intel’s EMIB technology and the status of its adoption by major customers.
• Changes in the penetration rate of CPOs in data center switches.