Huawei's LogicFolding Technology Breakthrough Underestimated by the Market
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Huawei's LogicFolding Technology Breakthrough Underestimated by the Market
Bernstein believes Huawei's LogicFolding stacking technology is a major breakthrough for chip performance improvement, which will drive the development of China's semiconductor industry chain.
- Huawei's LogicFolding technology achieves performance improvements through vertical stacking of logic circuits.
- The Kirin 2026 chip shows a 41% improvement in power efficiency and a 13% increase in frequency.
- Expected commercial application in autumn 2026, potentially used in the next-generation Mate series phones.
- High technical barriers; global manufacturers will find it difficult to replicate in the short term.
Report interpretation
Overview
This Bernstein research report explores Huawei's newly launched LogicFolding technology, considering it a significant breakthrough underestimated by the market. The technology is one of the key components of Huawei's Tau Scaling Law announced at ISCAS 2026, enabling substantial improvements in chip transistor density, power efficiency, and operating frequency.
Core views
The report points out that LogicFolding technology differs fundamentally from existing 3D IC packaging solutions. Traditional stacking approaches simply stack two independently designed chips together, easily doubling power consumption and heat generation without achieving real performance gains. In contrast, Huawei's LogicFolding decomposes the functional logic circuits originally on a single chip and distributes them across two vertically stacked wafer layers during the design phase, thereby reducing interconnect distances, lowering power consumption, and minimizing latency.
Analysis framework
Bernstein adopted a technical comparison analysis approach, thoroughly contrasting Huawei's LogicFolding with existing 3D IC solutions from three dimensions: technical principles, implementation paths, and performance outcomes. By analyzing chip physical structures, interconnect delay mechanisms, and power consumption components, analysts explained why vertical logic partitioning can achieve performance improvements. Meanwhile, the report also evaluated multiple dimensions—including commercialization timelines, technological barriers, and competitors' replication difficulties—to build a comprehensive framework for assessing technological competitiveness.
Methodology notes
Core technological breakthroughs in the semiconductor industry are often driven by supply-demand contradictions.
When traditional process routes hit bottlenecks, companies are forced to seek breakthroughs in alternative technological paths—just as Huawei developed advanced packaging technologies when lithography was constrained, similar to how DeepSeek innovated infrastructure due to computing capacity limitations.
Technological barriers determine a company's pricing power and profitability sustainability.
Products with high technological barriers can enjoy premium pricing for a considerable period, enhancing the company's free cash flow generation capability.
Asset mapping & comparison
Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).
- SMIC (688981.CH)Huawei's main LogicFolding technology foundry partner
- Strengths
- Strategic partnership with Huawei, advanced process node manufacturing capabilities
- Comparison
- More strategic advantages than other foundries
- Risks
- Trade restriction risks
- NAURA (002371.CH)Benefiting from growing demand for advanced logic packaging equipment
- Strengths
- Higher exposure in the advanced logic equipment field
- Comparison
- More advantageous than AMEC in advanced logic equipment
- Risks
- Technological iteration risks
- Piotech (688072.CH)Supplier of advanced packaging bonding equipment
- Strengths
- Focused on developing advanced packaging bonding tools
- Comparison
- The market will view it as one of the core beneficiaries in this field
- Risks
- Technical validation risks
Key data
- Power Efficiency Improvement+41%Improvement in SoC P-core compared to traditional solutions.
- Frequency Increase+13%Improvement in SoC P-core compared to traditional solutions.
- SRAM Operating Frequency Increase+40%+Improvement in static random-access memory operating speed.
- Interconnect Length Reduction-30%Shorter interconnect distance on representative cores.
- Transistor Density Increase155→238 MTr/mm²Density jump from 2025 to 2026.
Impact & implications
The report considers the breakthrough of LogicFolding technology to be of great significance for China's semiconductor industry chain. In the foundry sector, SMIC will be Huawei's strategic partner and is expected to benefit from demand for advanced processes; Hua Hong Semiconductor may also benefit from its acquisition of HuaLi Integrated. In the semiconductor equipment sector, NAURA and Piotech will benefit from growing demand for advanced packaging equipment. For AI chip design companies such as Cambricon and Hygon, Huawei's technological path provides possibilities for continuous performance improvement under EUV restrictions, but also brings fiercer competition.
Risks
- Commercialization progress slower than expected
- Global competitors accelerating technological catch-up
- Further tightening of trade restriction policies
- Discrepancy between technical validation results and marketing claims
What to watch
- Actual performance of Huawei's next-generation Mate series phones
- Chip teardown verification of LogicFolding technology's real effectiveness
- Order growth of SMIC and related companies
- Competitors' technological response measures