AMD steps up custom AI inference investment, while storage demand and analog chip recovery create multiple positive signals

Overview

This report discusses three main themes: the significance of AMD's acquisition of Taalas for custom AI inference architectures, the storage technology and demand trends revealed at the Future of Memory Storage 2026 conference, and recovery signals from the second-quarter 2026 analog semiconductor earnings season. The overall assessment is positive: fixed-model silicon could alleviate memory bottlenecks in inference, KV cache growth could tighten NAND supply-demand dynamics, and analog chip revenue, pricing, and end demand are improving in tandem.

Core views

First, by hardwiring model parameters into transistor structures, Taalas more thoroughly eliminates weight movement than GPUs and SRAM-centric architectures, and is expected to deliver higher performance per watt and lower cost for high-capacity inference tasks with relatively stable models. AMD can leverage its own chip R&D, supply chain, and customer resources to scale the technology. Second, persistent KV cache, CXL memory pooling, and HBF are key trends in storage; if SNDK's capacity forecast proves correct while incremental cleanroom capacity continues to be prioritized for HBM and DDR, NAND supply may struggle to fully match demand. Third, the analog chip industry has moved past the trough, with improving industrial, data center, and automotive demand, while price increases are also beginning to contribute as a tailwind, and industry earnings expectations continue to be revised upward.

Analysis framework

The report combines M&A technology architecture analysis, industry conference notes, scenario calculations for storage capacity and GPU utilization, and comparisons of analog semiconductor companies' earnings beats, earnings forecast revisions, and long-term revenue trends to assess the competitive positioning, cycle stage, and valuation risks of relevant companies.

Methodology notes

• Technology architecture comparisonInference memory bottleneck analysis

  Compare weight storage and data movement methods among GPUs, SRAM-centric architectures, and fixed-model silicon.

  GPUs need to repeatedly read model weights from external HBM; SRAM-centric architectures can reduce movement, but weights still exist in data form; Taalas directly hardwires weights into the silicon structure, thereby eliminating weight reads and allowing more SRAM to be used for dynamic functions such as KV cache and context processing.

• Thematic researchIndustry conference theme synthesis

  Extract three trends from the Future of Memory Storage 2026 conference: persistent KV cache, CXL memory pooling, and HBF.

  Analyze capacity demand, bandwidth, memory utilization, and GPU efficiency data disclosed at the conference to assess the potential impact of AI inference on NAND, DRAM, SSDs, and related interconnect solutions.

• Earnings analysisEarnings forecast revisions and cycle-position comparison

  Summarize quarterly revenue beats, subsequent guidance revisions, and the position of each end market relative to long-term trend lines.

  Assess the breadth of the analog semiconductor industry's recovery across three dimensions: company, end market, and product category, and distinguish the recovery progress of automotive, industrial, analog chips, and MCUs.

• Valuation methodsP/E and EV/FCF

  Use price-to-earnings or enterprise value to free cash flow multiples for valuation based on company characteristics.

  The report states that covered companies are valued using methods such as P/E and EV/FCF; ADI uses next-twelve-month P/E, and TXN uses an EV/FCF multiple. No target price is provided for AMD in this report.

Asset mapping & comparison

Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).

• US.AMD

  Expanded custom AI inference computing footprint after acquiring Taalas

  Strengths

  Has chip design R&D, supply chain, and customer relationships that can help scale fixed-model silicon technology.

  Weaknesses

  The Taalas architecture typically requires designing a new chip for each new model, making it less flexible than general-purpose GPUs.

  Comparison

  Compared with GPUs and SRAM-centric architectures, it can directly eliminate model weight reads and theoretically offers higher performance per watt and lower cost.

  Risks

  Technology commercialization, customer adoption, M&A integration, rapid model iteration, and progress in competing architectures could limit benefits.

• NAND and SSD

  Persistent KV cache could create significant incremental capacity demand

  Strengths

  Growth in AI inference sessions and context caching could increase demand for enterprise and network-attached SSDs.

  Weaknesses

  The long-term capacity forecast cited in the report lacks several key assumptions.

  Comparison

  Compared with traditional storage demand, KV cache growth may be faster and could account for an extremely high proportion of industry bit supply.

  Risks

  Overestimated demand, cache algorithm optimization, shorter data retention times, or supply expansion could all weaken pricing upside.

• SNDK

  Key beneficiary mapping for KV cache capacity forecasts and HBF technology

  Strengths

  HBF theoretical models show higher capital efficiency and GPU utilization, while persistent KV cache could also expand its serviceable market.

  Weaknesses

  HBF results remain early theoretical modeling, and key KV cache demand assumptions have not been fully disclosed.

  Comparison

  In the scenario shown, 4 HBF GPUs achieve roughly the same token throughput as 8 HBM GPUs.

  Risks

  Theoretical performance may not be replicated in real workloads, product mass production could be delayed, and the NAND pricing cycle could reverse.

• MRVL

  Provides CXL memory pooling, optical disaggregated memory, and high-bandwidth SRAM-related solutions

  Strengths

  CXL solutions can improve memory utilization and extend the life of traditional DRAM, while technology accumulated through the Celestial AI transaction supports its optical interconnect positioning.

  Weaknesses

  New disaggregated memory architectures still require validation of the ecosystem, software, and large-scale deployment.

  Comparison

  Its goal is to deploy memory outside the rack while achieving architecture performance as close to local memory as possible.

  Risks

  The deployment pace of hyperscale customers, standards evolution, and competing solutions could affect commercialization speed.

• TXN

  UBS's top pick in analog semiconductors

  Strengths

  Has share-gain potential during the industry upcycle and can benefit from fixed-cost leverage and pricing improvement.

  Weaknesses

  Capital investment levels are high, and it is relatively sensitive to cyclical end demand such as industrial and automotive.

  Comparison

  Its 2026 revenue forecast was raised by 2.6%, the largest revision among covered companies.

  Risks

  Rapid technological change, intense competition, pricing pressure, macro downturns, and cyclical fluctuations in end demand.

• Analog semiconductor industry

  Revenue expectations revised upward and entering a clearer cyclical recovery phase

  Strengths

  Industrial, data center, and automotive demand is improving, data centers provide structural growth, and price increases are beginning to become a tailwind.

  Weaknesses

  MCU remains about 13% below the long-term trend line, and industrial and automotive revenue have not yet fully recovered to trend levels.

  Comparison

  Non-MCU analog chips are already above the long-term trend line, with recovery clearly ahead of MCUs.

  Risks

  Macroeconomic downturn, international trade disruptions, technological substitution, weakening automotive and industrial demand, and lower-than-expected EV penetration.

Key data

• Persistent KV cache capacity demand in 2030About 1 ZBFrom SNDK estimates; the report notes that key assumptions such as concurrent session retention time, cache miss rate, and KV size per token have not yet been disclosed.
• Industry supply scale corresponding to KV cache demandMore than 70% of expected 2027 bit supplyIf demand materializes and incremental capacity is prioritized for HBM and DDR, NAND supply-demand dynamics could tighten further.
• HBF theoretical throughput comparison4 HBF GPUs approximately equal 8 HBM GPUsBased on the agentic AI workload model presented by SNDK, in which the HBM solution eventually needs to use slower system DRAM.
• HBF minimum-configuration capital efficiencyUp to about 8x improvementThis is an early theoretical performance modeling result from SNDK, not verified real-world mass-production performance.
• HBF equal-throughput GPU efficiencyAbout 2x improvementLarger storage capacity helps improve utilization of expensive GPU resources.
• Analog chip second-quarter revenue performance1.7% above expectationsFor companies that have already reported results.
• Analog chip third-quarter revenue forecast revisionRaised by 1.6%Close to the second-quarter beat.
• Full-year 2026 and 2027 revenue forecast revisionsRaised by about 1.5% and 3%, respectivelyShows that industry recovery expectations extend into the following year.
• 2026 revenue forecast revisions for TXN and ALGMRaised by 2.6% and 2.2%, respectivelyThe two largest revisions among UBS-covered companies.
• End-market and product revisionsAutomotive raised by about 2%; others raised by about 0.5%; industrial unchanged; analog chips raised by about 2%; MCU unchangedImprovements are more evident in automotive and non-MCU analog products.
• Relative to long-term revenue trend lineIndustrial and automotive both about 7% below; MCU about 13% below; non-MCU analog chips already above the trend lineReflects that recovery progress still differs across end markets and product categories.
• MRVL internal SRAM bandwidth densityAbout 17x that of industry alternativesThe bandwidth per square millimeter performance of the company's related internal intellectual property.

Impact & implications

For AMD, Taalas adds a fixed-model inference path differentiated from general-purpose GPUs, helping broaden its custom computing product portfolio, though its applicable scenarios are more biased toward workloads with stable models and sufficient scale. For the storage industry, persistent KV cache could become a new source of demand for SSDs and NAND, CXL can help improve DRAM utilization and extend the useful life of legacy technologies such as DDR4, while HBF could improve GPU utilization through larger capacity. For the analog chip industry, cyclical recovery, structural growth in data centers, and price increases above input cost inflation jointly support revenue and profit expectations, with TXN viewed as the most attractive name.

Risks

• The Taalas architecture typically requires developing a new chip for each new model, which may face mismatches among development cycles, costs, and the speed of model iteration.
• SNDK's roughly 1 ZB persistent KV cache forecast lacks key assumptions such as session retention time, cache miss rate, input token rate, and KV size per token.
• HBF performance and capital efficiency data are based on theoretical modeling, and throughput, power consumption, and cost in real applications remain to be verified.
• Analog semiconductor demand remains affected by the macroeconomy, industrial cycle, automotive, and EV penetration rates.
• International trade disruptions, technological innovation, and changes in business models could alter industry shipment volumes, average selling prices, and revenue paths.
• Semiconductor companies generally face intense competition, pricing pressure, and high capital investment risks.

What to watch

• AMD's product roadmap, customer validation progress, and initial commercial deployments after completing Taalas integration.
• Real-world energy efficiency, cost, and throughput of fixed-model silicon compared with GPUs, CBRS, and other SRAM-centric architectures.
• Further disclosure of SNDK's key assumptions for persistent KV cache forecasts, and whether AI-related SSD orders materialize.
• NAND manufacturers' capacity expansion pace and the allocation of incremental cleanroom capacity among HBM, DDR, and NAND.
• Adoption progress of CXL memory pooling and optical disaggregated memory in hyperscale data centers.
• HBF samples, mass-production timetable, and test results from real agentic AI workloads.
• Analog chip third-quarter guidance, subsequent price increases, and the sustainability of automotive and industrial demand recovery.
• The pace of MCU revenue recovery relative to the long-term trend line, and the realization of TXN's share gains and fixed-cost leverage.