WAIC 2026 shows that competition in China’s AI semiconductor industry is shifting toward SuperPods and system-level scaling
AI summary card
WAIC 2026 shows that competition in China’s AI semiconductor industry is shifting toward SuperPods and system-level scaling
Morgan Stanley believes that the competitive focus of domestic AI computing has moved beyond standalone accelerator card specifications toward interconnects, memory sharing, scheduling, and full-system utilization, benefiting domestic AI chip, advanced process, equipment, and packaging/testing segments with strong order visibility.
- Huawei Atlas 950 expands SuperPod scale to 1,024 Ascend 950DT NPUs, delivering about 1 EFLOPS FP8 and 2 EFLOPS FP4 compute, while improving scalability and reliability through UnifiedBus 2.0, hybrid copper-optical interconnects, and optical path protection.
- At WAIC 2026, nearly every domestic AI GPU or ASIC vendor showcased 64-card or 128-card SuperPod solutions, with differentiation likely to depend more on interconnect performance, software optimization, fault tolerance, and real application throughput.
- P/D disaggregation has emerged as a theme for inference efficiency optimization, assigning prefill and decode to different accelerator pools; one case showed a 54% throughput increase and a 64% decline in P90 time-to-first-token, though results depend on model, workload, scheduling, and interconnects.
- Iluvatar Tiangai 300 targets full-stage inference across both prefill and decode, supports FP4, FP8, and BF16, has 144GB of memory, and is expected to use HBM3E with about 4TB/s bandwidth.
- The report favors Cambricon, Iluvatar, Hygon, SMIC, NAURA, AMEC, ACM Research, and ASMPT; it maintains related Equal-weight views on MetaX, Hua Hong, and others.
Report interpretation
Overview
This report summarizes Morgan Stanley’s observations at Shanghai WAIC 2026 and the China Tech Tour on July 16–17. The core conclusion is that competition in China’s AI computing market is shifting from individual AI accelerator specifications toward SuperPod scaling, interconnect architecture, memory sharing, workload scheduling, system reliability, and full-system utilization. Although Chinese vendors remain constrained at the advanced process node level, they have shown compensating strengths in optical networking, server rack design, advanced packaging, and system-level engineering.
Core views
The report believes that the key change from WAIC 2025 to WAIC 2026 is fewer chip launches and a significant increase in SuperPod solutions. Huawei Atlas 950 expands scale to 1,024 NPUs; multiple domestic AI GPU and ASIC vendors showcased 64-card or 128-card systems; P/D disaggregation has become a new theme in inference deployment; and products such as Iluvatar Tiangai 300 and Oriental Computing’s 3D-stacked AI chips show that domestic vendors are using architectural and packaging innovation to work around process constraints. From an investment perspective, the report favors domestic AI computing companies with strong order visibility, as well as equipment and OSAT companies benefiting from the expansion of domestic memory, logic manufacturing, and advanced packaging.
Analysis framework
The report mainly uses conference research, booth observations, discussions with company management, supply-chain checks, and peer architecture comparisons, organizing its analysis around AI server systems, AI GPUs/ASICs, inference workload decomposition, equipment orders, wafer foundry pricing, packaging/testing capacity expansion, and China AI GPU TAM.
Methodology notes
Identify shifts in industry competitive focus through exhibition products and vendor discussions
The report compares the key changes between WAIC 2025 and WAIC 2026 and concludes that market attention has shifted from new accelerator launches to SuperPods, interconnects, scheduling, and system utilization.
Evaluate AI computing systems through scale, interconnects, memory, fault tolerance, and software stack
The report treats Atlas 950, domestic 64-card and 128-card solutions, orthogonal interconnects, and hybrid copper-optical interconnects as key indicators for judging system-level competitiveness.
Assign prefill and decode to different accelerator pools to improve resource utilization
Prefill is more compute-intensive, while decode is more sensitive to memory bandwidth and latency; after separation, they can be scheduled independently and support heterogeneous deployment.
Map AI computing demand to chips, advanced processes, equipment, wafer foundry, packaging/testing, optical interconnects, and related segments
The report links expanding domestic AI GPU demand with companies or segments such as SMIC, Hua Hong, NAURA, AMEC, ACM Research, ASMPT, and JCET.
Asset mapping & comparison
Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).
- CambriconPreferred domestic AI computing name
- Strengths
- Benefits from domestic AI accelerator demand, order visibility, and the trend of domestic substitution.
- Weaknesses
- The report excerpt does not disclose specific product parameters or financial estimates.
- Comparison
- Listed together with Iluvatar and Hygon as top domestic AI computing picks.
- Risks
- Demand realization, supply chain issues, process constraints, and system software ecosystem could all affect delivery.
- IluvatarCore beneficiary among domestic AI GPUs and inference accelerators
- Strengths
- Tiangai 300 covers prefill, decode, and post-training, with 144GB memory and about 4TB/s HBM3E bandwidth; the company expects shipments of about 100,000 cards this year.
- Weaknesses
- Tiangai 300 still lags Blackwell, and customer feedback and large-scale deployment remain to be validated.
- Comparison
- The company claims Tiangai 300 outperforms H100 in some domestic LLM tests, but still benchmarks Blackwell as the next-generation target.
- Risks
- Rising HBM and wafer costs, U.S. policy, domestic manufacturing progress, and pressure on customer engineering support.
- Huawei Ascend / Atlas 950Representative of the domestic SuperPod architecture direction
- Strengths
- Atlas 950 scales to 1,024 NPUs and uses UnifiedBus 2.0, hybrid copper-optical interconnects, and optical path protection.
- Weaknesses
- The report does not provide a commercial shipment timeline or actual training benchmarks.
- Comparison
- Compared with 2025’s CloudMatrix 384, scale expands from 384 Ascend 910C processors to 1,024 next-generation Ascend 950DT NPUs.
- Risks
- Communication efficiency in large-scale clusters, fault tolerance, software stack maturity, and supply chain availability.
- SMICBeneficiary of advanced-node capacity expansion
- Strengths
- The report favors SMIC, believing advanced-node capacity expansion can support the domestic AI computing supply chain.
- Weaknesses
- Advanced processes are affected by external restrictions, creating uncertainty in capacity expansion and yields.
- Comparison
- Compared with Hua Hong, SMIC is more directly tied to advanced-node expansion.
- Risks
- Export controls, equipment availability, yields, and customer demand cadence.
- Hua HongBeneficiary of specialty processes and AI PMIC demand
- Strengths
- 8-inch fab utilization is about 110%, prices have risen about 10–15%, and 9A and 9B expansion supports growth.
- Weaknesses
- Power semiconductor demand is weak, and depreciation will rise.
- Comparison
- The report maintains EW, but believes AI PMIC demand supports specialty wafer pricing.
- Risks
- Sustainability of pricing recovery, capacity ramp-up, HLMC Fab 5 integration, and changes in demand mix.
- NAURA / AMEC / ACM Research / ASMPTBeneficiary basket of semiconductor equipment and manufacturing localization
- Strengths
- Domestic investment in memory and advanced logic manufacturing is increasing, equipment localization is improving, and AMEC is advancing in FinFET, GAA, and 3D architecture platforms.
- Weaknesses
- Some potential 2027 demand has not yet been formally ordered, and overseas component lead times are lengthening.
- Comparison
- The report lists these companies as preferred names in the equipment segment.
- Risks
- Customer order conversion, localization pace, delivery capability, and price negotiations.
- JCET GroupBeneficiary of advanced packaging capacity expansion for AI chips
- Strengths
- The Shanghai Lingang CNY7.8bn advanced packaging and testing plant and JME 2.5D packaging capabilities support the AI computing trend.
- Weaknesses
- OSAT pricing follows the market, and substrate shortages may affect new capacity.
- Comparison
- More exposed to back-end testing/packaging and advanced packaging, unlike front-end equipment or wafer foundry.
- Risks
- Capex returns, capacity utilization, substrate supply, and the pace of AI GPU volume ramp-up.
- Nvidia / AMDGlobal peers and technology comparison benchmarks
- Strengths
- Nvidia NVLink and AMD UALink serve as global interconnect benchmarks.
- Weaknesses
- In China, they are affected by export restrictions and compliance factors.
- Comparison
- Domestic vendors are benchmarking global solutions through self-developed scale-up technology, optical interconnects, and server design.
- Risks
- Export controls, product availability, and accelerating domestic substitution by Chinese customers.
Key data
- Atlas 950 SuperPod scale1,024 NPUsConsists of 16 compute cabinets, each with 64 NPUs, plus 4 UnifiedBus interconnect cabinets.
- Atlas 950 system computeabout 1 EFLOPS FP8 / 2 EFLOPS FP4Each 64-NPU compute cabinet delivers about 64 PFLOPS FP8 and 128 PFLOPS FP4.
- Atlas 950 memory capacityabout 96TB HBM, with total memory pool up to 256TBAbout 6TB HBM per cabinet, combined with external DRAM for memory pooling.
- Common domestic SuperPod scale64–128 acceleratorsMultiple domestic AI GPU and ASIC vendors at WAIC 2026 showcased system solutions in this scale range.
- P/D disaggregation case results54% throughput improvement, 64% decline in P90 time-to-first-tokenOne WAIC discussion solution allocated about 90% domestic accelerators to prefill and 10% H20 to decode; actual gains depend on model, workload, scheduling, and interconnects.
- Iluvatar Tiangai 300 memory144GB, about 4TB/s HBM3E bandwidthPositioned to cover prefill, decode, and post-training, and supports FP4, FP8, and BF16.
- Oriental Computing DF10006.4TB/s bandwidth, 520TFLOPS BF16Uses a domestic 14nm-class process and near-memory 3D stacking; a 128-card cluster has completed full-function stability validation.
- China AI GPU TAM forecastUS$91bn by 2030From the title of a key chart in the report.
- China AI chip self-sufficiency forecast70% in 2030eFrom the title of a key chart in the report.
- Hua Hong pricing and utilizationabout 110% utilization at 8-inch fabs, with prices up about 10–15% from the end of last yearManagement stated that pricing could continue into 2027, with server-related demand currently leading.
- Iluvatar shipment outlookabout 100,000 cards this year, next year no less than this yearThe company is prioritizing scalable inference deployment.
- JCET advanced packaging investmentCNY7.8bn / US$1.1bnFor a new advanced packaging and testing plant in Shanghai Lingang to support AI computing and high-performance chips.
Impact & implications
From an investment perspective, the report views rising domestic AI computing demand, domestic substitution, advanced process expansion, investment in memory and logic manufacturing, and AI packaging expansion as the main drivers for Greater China semiconductors. At the chip level, it favors Cambricon, Iluvatar, and Hygon; in advanced processes and foundry, it is constructive on SMIC and remains cautiously neutral on Hua Hong; equipment vendors benefit from localization in memory and logic manufacturing, with preferences for NAURA, AMEC, ACM Research, and ASMPT; advanced packaging benefits from AI GPU volume ramp-up and the build-out of 2.5D/advanced packaging capacity.
Risks
- U.S. export controls and compliance restrictions related to Executive Order 14032 and Executive Order 14105 may affect relevant securities trading and supply chains.
- Standalone performance of domestic AI accelerators remains constrained by process technology, and system-level scaling requires simultaneous maturity in interconnects, fault tolerance, and software scheduling.
- The actual benefits of P/D disaggregation depend heavily on model structure, request distribution, scheduling algorithms, and interconnect performance, and cannot be simply extrapolated.
- Rising costs for HBM, wafers, and key components may compress margins for AI accelerators and server systems.
- Semiconductor equipment and packaging capacity expansion face pressure from order conversion, capacity ramp-up, customer price negotiations, and additional depreciation.
- Agentic AI demand has not yet scaled materially, and CPU-to-accelerator configurations and inference architectures may change with workload evolution.
What to watch
- Actual training deployments, benchmarks, and supply-chain progress for the Huawei Atlas 950 and Ascend 950DT platform.
- Interconnect efficiency, failure rates, software stack compatibility, and customer adoption of domestic 64-card, 128-card, and larger-scale SuperPods.
- Core customer feedback, mass-production cadence, HBM cost pass-through, and Tiangai 400 tape-out progress for Iluvatar Tiangai 300.
- China CSP capex, token demand growth from ByteDance/Doubao and others, and the pace of realization for China AI GPU TAM.
- SMIC advanced-node expansion, Hua Hong 9A/9B capacity ramp-up, and the acquisition/integration of HLMC Fab 5.
- Formal order conversion from memory and advanced logic customers for equipment companies such as NAURA, AMEC, and ACM Research.
- The Shanghai Lingang advanced packaging plant at JCET, JME 2.5D packaging revenue, and the degree of supply-demand tightness in AI GPU packaging.