Domestic AI chip testing demand is reaching an inflection point, and V-Test is expected to achieve high growth with first-mover advantages in equipment and capacity

Overview

V-Test is a leading third-party chip testing service provider in China. The report believes that localization of China's semiconductor supply chain, rising domestic AI chip production, and accelerated adoption of multi-chiplet architectures will jointly drive the third-party testing industry into a phase of structural growth. The company's prior counter-cyclical capacity expansion has created first-mover advantages in high-end equipment scale, customer certification, and delivery capabilities, positioning it to expand market share as demand is released and improve profitability through higher exposure to AI chips and wafer testing.

Core views

First, domestic AI chip testing demand is expected to grow at an 88% CAGR in 2026–2028 and account for about 30% of overall testing demand in 2028. Second, constrained by manufacturing capabilities and yield, domestic AI chips are accelerating adoption of chiplet or multi-chiplet designs, which will significantly increase the number and complexity of wafer tests and the duration of final testing. Third, V-Test has a leading high-end equipment fleet and continuously expanding capacity, enabling it to overcome equipment lead-time and customer certification barriers; its market share is expected to rise from about 10% to over 20% by 2028. Fourth, a rising share of higher-gross-margin wafer testing and AI chip testing, together with improved capacity utilization, is expected to lift blended gross margin from 39.4% in 2025 to 44.6% in 2028. Fifth, the company's valuation is at the low end of its historical range and at a clear discount to OSAT peers; a higher AI business mix, improved average selling prices, and an optimized earnings structure may trigger a valuation re-rating.

Analysis framework

The report evaluates the company's growth potential, competitive barriers, and target price by combining forecasts of China's semiconductor testing market size, scenario analysis of AI chip shipments and multi-chiplet architectures, the mature third-party testing market in Taiwan and the KYEC case, tracking of V-Test's equipment and capital expenditure, modeling of revenue and margins by business segment, and relative valuation versus A-share OSAT peers.

Methodology notes

• Industry demand forecastBottom-up demand estimation and scenario analysis

  Estimate testing demand based on the ramp-up of domestic AI chips, testing complexity, and multi-chiplet adoption rates.

  The report separately evaluates testing demand for traditional chips and AI chips, and assumes that a dual-chiplet solution increases the number and complexity of wafer tests to 1.5–2x and final testing time to 1.2–1.5x; on this basis, it estimates that multi-chiplet architectures can add about 15%–30% incremental upside to overall testing demand.

• Company forecastCapacity, utilization, and product-mix-driven model

  Forecast revenue and profit based on equipment investment, capacity release, market share, and changes in business mix.

  The report maps high capital expenditure and equipment deployment to revenue capacity over the next two to three years, while considering the impact on margins from a rising share of AI chip testing and high-gross-margin wafer testing, improved average selling prices, and higher utilization.

• Valuation methodsP/E relative valuation method

  Use one-year forward P/E to determine the target price.

  The target price uses 30x one-year forward P/E, a multiple close to the company's historical average over the past three years and about 30% below major A-share OSAT peers, reflecting the company's relatively limited short-term pricing flexibility.

• Comparable caseComparison with mature markets and the KYEC case

  Use Taiwan's third-party testing industry and KYEC's valuation changes to validate the growth and re-rating path of the AI testing industry.

  The Taiwan market shows that specialized division of labor can support higher third-party testing penetration; driven by AI demand, KYEC achieved earnings recovery from the cyclical trough and received a valuation re-rating, providing a reference for V-Test's potential development path.

Asset mapping & comparison

Structured mapping from thesis to named assets (strengths, weaknesses, peers, risks).

• V-Test (688372.SH)

  A major direct beneficiary of growth in domestic AI chip testing demand.

  Strengths

  Has more than 1,500 testing equipment units and over 400 high-end units; counter-cyclical capacity expansion has created first-mover advantages in equipment procurement and customer certification; relatively high wafer testing mix; continued investment in R&D and engineering capabilities; customer and application coverage is becoming increasingly diversified.

  Weaknesses

  Heavy capital expenditure and depreciation burden, relatively limited short-term pricing flexibility, and advanced equipment still relies relatively heavily on overseas suppliers.

  Comparison

  The company's current forward P/E is at about a 40% discount to the average level of major A-share OSAT peers; the target valuation multiple is about 30% below major A-share OSAT peers, but its 2026–2028 earnings CAGR is expected to be higher than the peer average.

  Risks

  Restrictions on procurement of advanced testing equipment, obstacles to reshoring overseas wafer testing, intensified industry competition, strong customer bargaining power, and weak non-AI demand leading to lower utilization.

Key data

• Share price on report dateRmb125.48As of August 7, 2026.
• Target priceRmb220.00June 2027 target price, corresponding to about 75% potential upside.
• AI chip testing demand CAGR88%Forecast for 2026–2028; the overall testing market is forecast to grow 23% over the same period.
• China testing market size in 2028About Rmb89bnAI chip testing demand is expected to account for about 30% of overall demand by then.
• Incremental demand from multi-chiplet15%—30%Additional upside to overall testing demand in China estimated through scenario analysis.
• Company revenue CAGR59%Forecast for 2026–2028.
• Company earnings CAGR73%Forecast for 2026–2028.
• Equipment scaleOver 1,500 unitsIncluding more than 400 high-end testing equipment units.
• 2025 capital expenditureRmb2.9bnCapital expenditure equals 187% of revenue for the year.
• Market shareFrom about 10% to over 20%Expected to double by 2028.
• Blended gross marginFrom 39.4% to 44.6%From the actual level in 2025 to the forecast level in 2028.
• 2028 revenueRmb6,332mnActual revenue in 2025 was Rmb1,575mn.
• 2028 net profitRmb1,580mnActual net profit in 2025 was Rmb303mn.
• Target valuation multiple30xOne-year forward P/E, about 30% below major A-share OSAT peers.

Impact & implications

If domestic AI chips enter mass production at scale as expected, third-party testing demand will be driven simultaneously by shipment volume, longer testing time, and greater complexity. V-Test's equipment scale, accumulated customer certifications, and relatively high wafer testing exposure may enable it to achieve revenue growth above the industry average and release operating leverage through product mix and utilization improvements. In the capital market, the company's current valuation discount to OSAT peers is expected to narrow as the share of AI revenue rises and earnings are delivered. However, high capital expenditure also increases sensitivity to capacity utilization and the pace of demand realization.

Risks

• High-end automated testing equipment and probers are mainly supplied by overseas vendors, with lead times of about 6–12 months; export controls or geopolitical changes may delay capacity expansion and revenue conversion.
• If regulatory rules for advanced-node wafers are further tightened, overseas wafers may not be able to be sent to mainland Chinese testing providers for wafer testing.
• OSAT companies and new entrants may allocate more resources to AI chip testing, and improvements in domestic equipment capabilities may also lower industry entry barriers, leading to increased competition and pricing pressure.
• Customers have strong bargaining power, and the company may find it difficult to fully pass through cost increases or maintain AI testing premiums over the long term.
• Macroeconomic slowdown or rising terminal bill-of-materials costs may suppress non-AI chip demand and reduce equipment utilization; fixed depreciation will amplify downward pressure on margins.
• Domestic AI chip mass production, multi-chiplet adoption rates, or customer certification progress falling short of expectations may prevent revenue and earnings forecasts from being realized.
• Sustained high capital expenditure may increase pressure on debt, depreciation, and free cash flow.

What to watch

• The pace of mass production and shipment ramp-up of domestic AI chips starting from the end of 2026.
• Adoption rates of chiplet and dual-chiplet solutions in domestic AI chips, and the actual magnitude of increases in the number of wafer tests and final testing duration.
• Arrival of high-end testing equipment, construction of the Shanghai headquarters and Chengdu plant, and progress in releasing new capacity.
• Growth rate of computing chip revenue, share of AI chip testing revenue, and changes in the share of the wafer testing business.
• Whether testing equipment utilization, average selling prices, and blended gross margin can improve as forecast.
• Whether the company's market share can advance from about 10% toward over 20% by 2028.
• Changes in U.S. export controls, restrictions on procurement of advanced equipment, and rules for reshoring overseas wafer testing.
• Non-AI chip testing demand and competitive behavior by OSAT companies and new entrants.
• Trends in capital expenditure, accounts payable, construction in progress, net debt, and free cash flow.
• Whether the valuation discount to A-share OSAT peers narrows as earnings are delivered.